A 65nm 60mW Dual-Loop Adaptive Digital Beamformer with Optimized Sidelobe Cancellation and On-Chip DOA Estimation for mm-Wave Applications

Abstract

This paper demonstrates an mm-wave baseband digital beamformer that fully integrates an adaptive sidelobe canceller and on-chip direction of arrival (DOA) estimation. To achieve high energy-efficiency, the DOA estimation loop preemptively adjusts the weights of the phase rotators at the front of the SAR-ADCs, which enables the sidelobe cancellation loop to be implemented with a straightforward structure. For efficient ESPRIT DOA estimation, CORDIC-based QR-iteration is employed to solve eigenvalue decomposition, thus circumventing the need for complex matrix computation. The adaptive beamformer implemented in 65nm CMOS dissipates 60mW at 100MHz while occupying 0.64mm 2 on-chip area. The energy efficiency is 600(330) pJ/symbol with (without) DOA estimation.