{"title":"A digital partial built-in self-test structure for a high performance automatic gain control circuit","authors":"A. Lechner, J. Ferguson, A. Richardson, B. Hermes","doi":"10.1145/307418.307496","DOIUrl":null,"url":null,"abstract":"it is now widely recognised that design-for-testability and built-in self-test techniques will be mandatory to meet test and quality specifications in next generation mixed signal integrated systems. This paper describes a new digital on-chip post processing function capable of reducing production test time for a high performance automatic gain control circuit by 70%.","PeriodicalId":442382,"journal":{"name":"Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078)","volume":"69 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/307418.307496","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
it is now widely recognised that design-for-testability and built-in self-test techniques will be mandatory to meet test and quality specifications in next generation mixed signal integrated systems. This paper describes a new digital on-chip post processing function capable of reducing production test time for a high performance automatic gain control circuit by 70%.