ILP-based optimization of sequential circuits for low power

Feng Gao, J. Hayes
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引用次数: 23

Abstract

The power consumption of a sequential circuit can be reduced by decomposing it into subcircuits which can be turned off when inactive. Power can also be reduced by careful state encoding. Modeling a given circuit as a finite-state machine, we formulate its decomposition into submachines as an integer linear programming (ILP) problem, and automatically generate the ILP model with power minimization as the objective. A simple, but powerful state encoding method is used for the submachines to further reduce power consumption. We present experimental results which show that circuits designed by our approach consume 30% to 90% less power than conventional circuits.
基于ilp的低功耗时序电路优化
顺序电路的功耗可以通过将其分解成子电路来降低,这些子电路可以在非活动时关闭。通过仔细的状态编码也可以降低功耗。将给定电路建模为有限状态机,将其分解为子机,将其分解为整数线性规划(ILP)问题,并以功率最小化为目标自动生成ILP模型。为了进一步降低功耗,采用了一种简单但功能强大的状态编码方法。我们给出的实验结果表明,用我们的方法设计的电路比传统电路功耗低30%到90%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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