An efficient fractional motion estimation architecture for avs real-time full Hd video encoder

Fei Wang, Yuan Li, Huizhu Jia, Xiaodong Xie, Wen Gao
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引用次数: 5

Abstract

Fractional motion estimation (FME) as a complement to integer motion estimation (IME) conducts higher compression rate in video coding. Based on multiple reference frames and all modes of variable-block-size (VBS) motion search, the common FME algorithm and architecture generally causes high computational complexity. It consumes plenty of time and hardware resources to process the real-time (30fps) high definition (HD) video compression. In this paper, we propose an efficient FME algorithm and architecture that significantly reduce the number of the candidate sub-pixels by predicting quarter motion vector and cost less hardware by saltatory interpolation. Compared with the conventional FME architecture, the proposed method reduces resources significantly and accelerates the processing speed. 75% circuit area and 68% computational complexity are saved with only 0.1dB drop in performance and similar bit rate saving on average. Experiments of various sequences show that HD video (1920×1080) can be processed in real-time at frequency of 100MHz and it is verified in an AVS HD encoder on a Xilinx Virtex-6 FPGA prototype system.
avs实时全高清视频编码器的高效分数运动估计体系结构
分数运动估计(FME)作为整数运动估计(IME)的补充,在视频编码中具有更高的压缩率。常见的FME算法和架构基于多参考帧和所有模式的可变块大小(VBS)运动搜索,计算复杂度较高。实时(30fps)高清视频压缩需要耗费大量的时间和硬件资源。在本文中,我们提出了一种高效的FME算法和架构,通过预测四分之一运动向量显著减少候选子像素的数量,并通过跃变插值减少硬件成本。与传统的FME结构相比,该方法显著减少了资源,提高了处理速度。节省了75%的电路面积和68%的计算复杂度,性能仅下降0.1dB,平均节省了相似的比特率。各种序列的实验表明,可以在100MHz频率下实时处理高清视频(1920×1080),并在Xilinx Virtex-6 FPGA原型系统上的AVS高清编码器中进行了验证。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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