Memory Behaviour and Distributed Capacitive Coupling Model for Low Frequency Inversion Capacitance of a Quantum Dot Flash Memory Gate Stack

Abstract

Initially, FGMOS gate stack is examined for satisfactory memory behaviour. Later, we present a simple analytical model for the low frequency capacitance of a quantum dot based flash memory gate stack. The model makes use of simple parallel combination of capacitances offered by differentiating regions formed in the gate stack of a flash memory. The model describes overall capacitance where dimensions, number of dots and inter-dot spacing do not affect the validity of the model. With this model, it is possible to develop expressions for static behaviour and dynamic charging of the memory device. The results are compared with the simulation outputs. There is a close matching.