Minimizing Energy Consumption with Variable Forward Body Bias for Ultra-Low Energy LSIs

Abstract

Ultra-low energy LSI becomes primary concern in today's battery driven ubiquitous computing portable applications. To reduce energy per transition and to enhance performance in the ultra-low voltage region, we review the variable forward body bias scheme to make either faster pull-up or pull-down transition in the sub-threshold, near-threshold and above-threshold regimes. We begin our study for minimizing energy per transition by applying variable forward body bias asymmetrically and propose novel approaches to energy efficient design with performance advantages. To analyze and discuss, the fan-out of 3 (FO3) inverter based 51-stage delay chain is simulated in an industrial 130 nm triple well process technology.