A scalable pipelined architecture for biomimetic vision sensors

Abstract

This work presents a novel scalable and fully pipelined digital hardware implementation for a biomimetic vision sensor that mimics the compound eye of the common house fly. The hardware includes IIR filters, FIR filters, and arithmetic units. By employing techniques such as scattered look-ahead decomposition, retiming, and distributed arithmetic, a fully parallel and pipelined system that produces new outputs at every clock cycle is achieved. Trade-offs among design parameters, accuracy, and resource usage are explored. A generic and parameterized architecture is developed in VHDL and validated using an FPGA implementation. The developed hardware shows great promise as it allows for the implementation of fly-inspired sensing and control algorithms whose motion and edge detection capabilities surpass those of traditional image processing systems.