Design of a Low-Energy Nonvolatile Fully-Parallel Ternary CAM Using a Two-Level Segmented Match-Line Scheme

Abstract

A novel compact and static-power-free nonvolatile ternary content-addressable memory (TCAM) cell, where two-bit nonvolatile magnetic tunnel junction (MTJ) devices are stacked over the comparison logic circuit, is proposed for a high-density and ultra low-energy fully-parallel TCAM. The use of nonvolatile logic-in-memory circuit architecture makes it possible to realize 6T-2MTJ TCAM cell structure. The 144-bit word match-line is divided into two parts (first 10-bit and last 134-bit parts), which greatly reduces the dynamic power dissipation with small overhead of the switching delay. In fact, it is evaluated by the HSPICE simulation under a 90nm CMOS/MTJ technology that the search energy (power-delay product) of the proposed TCAM is reduced to 16 percent in comparison with that of a nonvolatile TCAM without using a segmented match-line scheme.