Area and time efficient modular multiplication of large integers

Proceedings IEEE International Conference on Application-Specific Systems, Architectures, and Processors. ASAP 2003 Pub Date : 2003-06-24 DOI:10.1109/ASAP.2003.1212863

Viktor Bunimov, M. Schimmler

{"title":"Area and time efficient modular multiplication of large integers","authors":"Viktor Bunimov, M. Schimmler","doi":"10.1109/ASAP.2003.1212863","DOIUrl":null,"url":null,"abstract":"A new modular multiplication algorithm and its corresponding architecture is presented. It is optimised with respect to hardware complexity and latency. Based on the dataflow of the well known interleaved modular multiplication the product of two n-bit-integers X and Y modulo M is computed by n iterations of a simple loop. The loop consists of one single carry save addition, a comparison of constant complexity, and a table lookup, where the table contains 6 precomputed values and two constants. By this construction the arithmetical complexity of the modular multiplication is reduced to n additions without carry propagation in total which leads to a speedup of at least two in comparison to all methods previously known. It consists of a first algorithm A2 implementing the new idea of combining carry save addition and constant time comparison. A2 is not optimal with respect to area and time. Its correctness is proven. By use of a small amount of precomputing the loop of A2 can be modified such that the effort within the loop is minimised. This leads to the algorithm A3 and it is verified.","PeriodicalId":261592,"journal":{"name":"Proceedings IEEE International Conference on Application-Specific Systems, Architectures, and Processors. ASAP 2003","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"46","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings IEEE International Conference on Application-Specific Systems, Architectures, and Processors. ASAP 2003","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASAP.2003.1212863","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 46

Abstract

A new modular multiplication algorithm and its corresponding architecture is presented. It is optimised with respect to hardware complexity and latency. Based on the dataflow of the well known interleaved modular multiplication the product of two n-bit-integers X and Y modulo M is computed by n iterations of a simple loop. The loop consists of one single carry save addition, a comparison of constant complexity, and a table lookup, where the table contains 6 precomputed values and two constants. By this construction the arithmetical complexity of the modular multiplication is reduced to n additions without carry propagation in total which leads to a speedup of at least two in comparison to all methods previously known. It consists of a first algorithm A2 implementing the new idea of combining carry save addition and constant time comparison. A2 is not optimal with respect to area and time. Its correctness is proven. By use of a small amount of precomputing the loop of A2 can be modified such that the effort within the loop is minimised. This leads to the algorithm A3 and it is verified.

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面积和时间效率高的大整数模乘法

提出了一种新的模乘法算法及其体系结构。它在硬件复杂性和延迟方面进行了优化。基于众所周知的交错模乘法的数据流，通过简单的循环n次迭代计算两个n位整数X和Y模M的乘积。循环由一个进位保存加法、一个常量复杂度的比较和一个表查找组成，其中表包含6个预先计算的值和两个常量。通过这种结构，模乘法的算术复杂度被减少到n个加法，总共没有进位传播，与以前已知的所有方法相比，这导致至少两倍的加速。它由第一个算法A2组成，实现了进位节省加法和常数时间比较相结合的新思想。就面积和时间而言，A2不是最优的。它的正确性得到了证明。通过使用少量的预计算，可以修改A2的循环，使循环内的努力最小化。这引出了算法A3，并对其进行了验证。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Proceedings IEEE International Conference on Application-Specific Systems, Architectures, and Processors. ASAP 2003

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