A 4.4 GS/s 220 MHz ΣΔ ADC with a Linearized Back-Gate Controlled GmC Filter

Abstract

This paper presents a 4.4 GS/s220Mhz bandwidth continuous time sigma delta modulator with a linear GmC loop filter enabled by voltage tracking through multi-bit feedback and an active linearization scheme employing the back-gate node. An auxiliary amplifier drives the back-gate node of the main differential pair to linearize the overall $\mathrm{G}_{\mathrm{m}}(\mathrm{V}_{\mathrm{i}\mathrm{n}}$) curve. The fabricated prototype shows a 27dB reduction in third order intermodulation (IM3) products down to -78dBc and a SNDR of 62dB while consuming 22 mW, reaching excellent 49fJ/step power efficiency.