R. Lacoe, S. Moss, J. V. Osborn, B. Janousek, S. Lalumondiere, S. Brown, D. C. Mayer
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引用次数: 8
Abstract
Neutron and proton irradiations have been used to improve the latchup susceptibility of CMOS test structures fabricated at a radiation-tolerant commercial submicron CMOS foundry. The test structures were varied in critical spacing dimensions to represent a range of layout conditions in typical CMOS circuits. SPICE simulations were used to relate changes in latchup tolerance to reduced parasitic bipolar gains and increased well and substrate resistances in these CMOS circuits. It is shown that decreasing transistor gains and increasing resistances can have competing influences on latchup threshold. These competing effects can explain the observed initial reduction in latchup threshold for some proton irradiation conditions.