STI gap-fill optimization for advanced nodes

Abstract

High aspect ratio process (HARP) and siconi process is widely used for STI gap fill in sub-65nm CMOS; it has good gap fill performance to high aspect profile. As IC technology advances to 28 nm and beyond, void free, high throughput and good uniformity STI gap fill has become a significant process challenge. In this work, we optimize AA etch profile and HARP process to improve STI gap fill. Use O3 or H2 plasma treat ISSG (in-situ steam generation) wafer surface to adjust the surface condition before STI cap. The result shows that after O3 plasma treatment HARP STI film has good film thickness uniformity and high film grow rate on ISSG wafer. From TEM cut and top down scan, void free and high throughput STI gap fill process has been achieved.