Optimal design flow of CMOS doubler-based rectifiers

Soumik Sarkar, Gaurav Saini, Mahima Arrawatia, M. Baghini
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Abstract

This paper proposes an optimal design flow for designing CMOS doubler based rectifiers. The work uses a simulation-based approach, considering important bounds on the size of the components. A way for comparing and predicting the performance of diodes made of various devices has been presented. The flow is specifically shown in the context of Radio-Frequency (RF) energy harvesting application. However the flow can be also extended to other application scenarios. The design flow is explained using diode characteristics and is independent of the device and technology used to make the diode. The flow has been demonstrated by comparing doubler-based rectifiers designed with this flow with two earlier works in 180nm CMOS technology. In one case the power delivered to the load has increased more than 1.8 times, and in the other case the area is 2/3 of the area used in the previous work.
CMOS倍频整流器的优化设计流程
本文提出了一种基于CMOS倍频器整流器的优化设计流程。这项工作使用了基于模拟的方法,考虑了组件大小的重要界限。提出了一种比较和预测由不同器件制成的二极管性能的方法。该流程在射频(RF)能量收集应用的背景下特别显示。但是,该流也可以扩展到其他应用程序场景。设计流程是用二极管的特性来解释的,与制造二极管的设备和技术无关。通过将采用该流程设计的基于倍频的整流器与两种采用180nm CMOS技术的早期作品进行比较,证明了该流程。在一种情况下,传递给负载的功率增加了1.8倍以上,在另一种情况下,面积是以前工作中使用的面积的2/3。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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