{"title":"On-chip reconfigurable SC power supply with adaptive gain/pulse control for self-powered energy-efficient devices","authors":"I. Chowdhury, D. Ma","doi":"10.1109/ISIE.2008.4677263","DOIUrl":null,"url":null,"abstract":"Motivated by emerging self-sustained low-power applications, this paper presents a new integrated power supply solution with reconfigurable step-up/down switched-capacitor power stage and adaptive gain/pulse control, featuring variable gain ratios, low ripples and fast transient responses. The converter was designed with TSMC 0.35-mum digital CMOS N-well process. With an input voltage ranging from 1.5 to 3.3 V, the converter achieves variable step-up/down voltage conversion with an output from 0.9 to 2.7 V with a maximum efficiency of 88%. The steady-state peak-to-peak ripple voltage is controlled below 14 mV. Load transient response to a 50-mA step change is 7 mus. Input current ripples and output voltage ripples are significantly reduced compared to the prior arts. The design can be easily extended and reconfigured for different operation scenarios.","PeriodicalId":262939,"journal":{"name":"2008 IEEE International Symposium on Industrial Electronics","volume":"103 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE International Symposium on Industrial Electronics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISIE.2008.4677263","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
Motivated by emerging self-sustained low-power applications, this paper presents a new integrated power supply solution with reconfigurable step-up/down switched-capacitor power stage and adaptive gain/pulse control, featuring variable gain ratios, low ripples and fast transient responses. The converter was designed with TSMC 0.35-mum digital CMOS N-well process. With an input voltage ranging from 1.5 to 3.3 V, the converter achieves variable step-up/down voltage conversion with an output from 0.9 to 2.7 V with a maximum efficiency of 88%. The steady-state peak-to-peak ripple voltage is controlled below 14 mV. Load transient response to a 50-mA step change is 7 mus. Input current ripples and output voltage ripples are significantly reduced compared to the prior arts. The design can be easily extended and reconfigured for different operation scenarios.