A Study of High Voltage NMOSFET degradation for NAND HVSW circuit

Abstract

Reliabilities of high voltage transistors has become a major concern for NAND tech scaling. In this work, we investigate reliabilities of HVN transistors. When a high bias stress was applied, large degradation of HVN transistors has been observed. This degradation has been attributed to electron injection with high energy by FN stress. We have found that the Vt shift of HVN causes malfunction of the circuit operation, and we have suggested the fail criteria of HVN for precise evaluation.