Intelligent optical backplanes

H. S. Hinton, K. Devenport, D. Plant, T. Szymanski
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引用次数: 8

Abstract

One of the practical limiting factors in the development and acceptance of teraflop multiprocessor computing systems (as well as large ATM switching systems) is packaging. Currently large systems, 64 processing nodes and above, can require multiple cabinets to house all their electronic equipment. This low-density packaging not only leads to expensive systems but also suffers from increased latency, skew, and other physical problems that limit overall performance. As thermal management schemes have progressed there is a growing trend to package more electronics into smaller physical volumes. The result is the integration of more processing nodes (PN) per integrated circuit, more PNs per printed circuit board (PCB), and more PCBs per shelf. This necessary hardware compression leads to an interconnect bottleneck at the backplane. One approach to overcome these interconnection limitations of electrical backplanes is to exploit the temporal and spatial bandwidth available with the free-space optical technology. A free-space optical backplane is composed of a large number of optically interconnected smart pixel arrays (SPAs). A smart pixel is an optoelectronic device that combines optical inputs and/or outputs with electronic processing circuitry, and is capable of being integrated into two-dimensional arrays. In an intelligent optical backplane, the SPAs control the flow of information between the PCBs.
智能光学背板
开发和接受teraflop多处理器计算系统(以及大型ATM交换系统)的实际限制因素之一是封装。目前,64个处理节点及以上的大型系统可能需要多个机柜来容纳所有电子设备。这种低密度封装不仅会导致昂贵的系统,而且还会增加延迟、倾斜和其他限制整体性能的物理问题。随着热管理方案的发展,越来越多的电子产品被封装到更小的物理体积中。其结果是每个集成电路集成了更多的处理节点(PN),每个印刷电路板(PCB)集成了更多的PN,每个机箱集成了更多的PCB。这种必要的硬件压缩导致了背板上的互连瓶颈。克服这些电背板互连限制的一种方法是利用自由空间光学技术提供的时间和空间带宽。自由空间光背板由大量光互联的智能像素阵列(spa)组成。智能像素是将光学输入和/或输出与电子处理电路相结合的光电器件,并且能够集成到二维阵列中。在智能光背板中,spa控制着pcb之间的信息流。
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