High resolution and frame rate image signal processor array design for 3-D imager

Abstract

This paper presents a high resolution and frame rate image signal processor (ISP) array design for three-dimensional (3-D) imager. Based on the through-silicon via (TSV) technology, the short connections of the 3-D integrated circuit (IC) can improve the performance and density. Hence, the 3-D imager is the best solution for high throughput image capture or video recorder applications. The proposed ISP array is based on high resolution CMOS image sensor (CIS) and analog-to-digital converter (ADC) array to achieve three mega pixels (2048×1536) at 100 frames per second in 3-D imager. The architectural simulation results show the proposed design costs area 9000× 7000 μm2, average power 0.79 W and throughput 6.93 bps to verify the feasibility of high resolution and frame rate application for 3-D imager.