Flip-chip encapsulation on ceramic substrates

Abstract

Flip-chip encapsulation has been shown to provide at least a 5-10/spl times/ improvement in fatigue life of C4 (controlled collapse chip connection) solder joints. IBM has developed, qualified and implemented encapsulation in production for a wide array of selected C4 footprint chips attached to ceramic substrates. In addition to providing a very substantial improvement in reliability, this technology has enabled major extensions to the flip-chip on ceramic menu by relaxing chip footprint or size constraints, accommodating larger chips and allowing smaller C4's on finer pitches. Also, new package technologies have evolved that feature thin and lightweight surface mountable designs that conform to industry outlines. IBM evaluated several encapsulant formulations and tested over 2000 encapsulated chips and 200000 individual C4's during the development and qualification phases. Test data was collected for a variety of accelerated thermal cycling (ATC) conditions and was supported by extensive finite element modeling. Chip configurations included memory and logic footprints and ranged in size to 14.7 mm chip size and 10.2 mm DNP (distance from neutral point of chip footprint). In all cases, ATC data showed a dramatic improvement in C4 life on encapsulated chips with no adverse effects in other tests. Several different encapsulant formulations, each with minor variations, were evaluated, and the encapsulant dispense and cure process was optimized for ease of manufacturing high production volumes that are required by IBM.<>