Built in self test for ring addressed FIFOs with transparent latches

Records of the 1999 IEEE International Workshop on Memory Technology, Design and Testing Pub Date : 1999-08-09 DOI:10.1109/MTDT.1999.782686

L. Fenstermaker, Ilyoung Kim, J. Lewandowski, J. J. Nagy

引用次数: 0

Abstract

The use of special purpose complex embedded memories is becoming increasingly common. Their complex functionality, large sizes, decreasing feature sizes, and limited controllability/observability combine to make testing ever more difficult. In this paper, we describe a built in self test (BIST) method for testing ring addressed first in first out memories (FIFOs) that use transparent input latches for applications that require high data rates. The method used is compared to previous results for ring addressed FIFOs with edge triggered input latches. Several different special test modes are used to provide both more efficient and more complete BIST.

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内置自检环寻址fifo与透明锁存器

特殊用途复杂嵌入式存储器的使用正变得越来越普遍。它们复杂的功能、巨大的尺寸、不断减少的特性尺寸以及有限的可控性/可观察性使得测试变得更加困难。在本文中，我们描述了一种用于测试环寻址先入先出存储器(fifo)的内置自检(BIST)方法，该方法使用透明输入锁存器用于需要高数据速率的应用。所使用的方法是比较以前的结果环寻址fifo与边缘触发输入锁存器。使用几种不同的特殊测试模式来提供更高效和更完整的BIST。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Records of the 1999 IEEE International Workshop on Memory Technology, Design and Testing

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