CMOS compatible fabrication of 3D photonic crystals by nanoimprint lithography

M. Eibelhuber, T. Uhrmann, T. Glinsner
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Abstract

Nanoimprinting techniques are an attractive solution for next generation lithography methods for several areas including photonic devices. A variety of potential applications have been demonstrated using nanoimprint lithography (NIL) (e.g. SAW devices, vias and contact layers with dual damascene imprinting process, Bragg structures, patterned media) [1,2]. Nanoimprint lithography is considered for bridging the gap from R and D to high volume manufacturing. In addition, it is capable to adapt to the needs of the fragmented and less standardized photonic market easily. In this work UV-NIL has been selected for the fabrication process of 3D-photonic crystals. It has been shown that UVNIL using a multiple layer approach is well suited to fabricate a 3D woodpile photonic crystal. The necessary alignment accuracies below 100nm were achieved using a simple optical method. In order to obtain sufficient alignment of the stacks to each other, a two stage alignment process is performed: at first proximity alignment is done followed by the Moire´ alignment in soft contact with the substrate. Multiple steps of imprinting, etching, Si deposition and chemical mechanical polishing were implemented to create high quality 3D photonic crystals with up to 5 layers. This work has proven the applicability of nanoimprint lithography in a CMOS compatible process on 3D photonic crystals with alignment accuracy down to 100nm. Optimizing the processes will allow scaling up these structures on full wafers while still meeting the requirements of the designated devices.
用纳米压印技术制备CMOS兼容的三维光子晶体
纳米压印技术是下一代光刻技术的一个有吸引力的解决方案,包括在光子器件领域。纳米压印光刻(NIL)的各种潜在应用已经被证明(例如SAW器件、双大马士革压印工艺的过孔和接触层、Bragg结构、图画化介质)[1,2]。纳米压印光刻被认为是弥合从研发到大批量生产的差距。此外,它能够很容易地适应碎片化和不太规范的光子市场的需求。在这项工作中,UV-NIL被选择用于三维光子晶体的制造过程。研究表明,采用多层方法的UVNIL非常适合制作三维木堆光子晶体。使用一种简单的光学方法获得了100nm以下所需的对准精度。为了获得堆叠之间的充分对齐,执行两个阶段的对齐过程:首先进行近距离对齐,然后在与衬底软接触时进行云纹对齐。通过印迹、蚀刻、硅沉积和化学机械抛光等多个步骤,实现了高达5层的高质量3D光子晶体。这项工作证明了纳米压印光刻在CMOS兼容工艺中对3D光子晶体的适用性,其对准精度低至100nm。优化工艺将允许在完整晶圆上扩展这些结构,同时仍然满足指定器件的要求。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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