Field programmable DSP transform arrays

Abstract

Several dedicated VLSI architectures have been proposed in the literature for performing most of the linear transforms like DCT, DST, FFT and AFT, having orthogonal basis functions, though not much on the the non-orthogonal transforms like the Gabor. We present a hardware-reconfigurable architecture with which almost all these linear, nonlinear, orthogonal and non-orthogonal transforms can be performed. Also the reconfigurability helps perform inverse transforms. The architecture has DCT, DST, and arithmetic blocks respectively and a switching network. This switching network is hardware-reconfigurable to make interconnections between the DCT, the DST and the arithmetic blocks. With the help of the switching network, the multiplier units, adder/subtractor units present in the arithmetic blocks can be reconfigured to perform inner product (IP) operations. It is well-known that IP plays a major role in DSP. The structure of the architecture is such that, the user (in the field) can easily program the different hardware reconfigurations for performing either single, multiple or multi-dimensional forward and reverse transforms. This reconfigurable architecture is suitable for a MCM type of implementation.