Yoshinori Nishi, J. Poulton, Xi Chen, Sanquan Song, B. Zimmer, Walker J. Turner, S. Tell, N. Nedovic, John M. Wilson, W. Dally, C. T. Gray
{"title":"A 0.190-pJ/bit 25.2-Gb/s/wire Inverter-Based AC-Coupled Transceiver for Short-Reach Die-to-Die Interfaces in 5-nm CMOS","authors":"Yoshinori Nishi, J. Poulton, Xi Chen, Sanquan Song, B. Zimmer, Walker J. Turner, S. Tell, N. Nedovic, John M. Wilson, W. Dally, C. T. Gray","doi":"10.23919/VLSITechnologyandCir57934.2023.10185334","DOIUrl":null,"url":null,"abstract":"This paper presents an Inverter-based AC-coupled Toggle (ISR-ACT) transceiver targeted for short-reach die-to-die communication over silicon interposer or similar high-density interconnect. The ISR-ACT’s transmitter sends NRZ data through a small on-chip capacitor into the line. The receiver amplifies the low-swing pulses using a 1st-stage TIA to fully toggle the 2nd-stage output, where positive feedback to the input pad maintains the DC level on the line. Fabricated in a 5nm standard CMOS process, ISR-ACT link shows 0.66UI margin at 25.2Gb/s/wire on a 0.75V supply over a 1.2mm on-chip channel and demonstrates the potential to achieve 0.190pJ/bit.","PeriodicalId":317958,"journal":{"name":"2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185334","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents an Inverter-based AC-coupled Toggle (ISR-ACT) transceiver targeted for short-reach die-to-die communication over silicon interposer or similar high-density interconnect. The ISR-ACT’s transmitter sends NRZ data through a small on-chip capacitor into the line. The receiver amplifies the low-swing pulses using a 1st-stage TIA to fully toggle the 2nd-stage output, where positive feedback to the input pad maintains the DC level on the line. Fabricated in a 5nm standard CMOS process, ISR-ACT link shows 0.66UI margin at 25.2Gb/s/wire on a 0.75V supply over a 1.2mm on-chip channel and demonstrates the potential to achieve 0.190pJ/bit.