XU Ze-kun, Shen Hong-yu, HU Tao, Guo-Chih Wei, Dong Shu-rong
{"title":"Vertical silicon-controlled rectifier for ESD protection under 28nm ps process","authors":"XU Ze-kun, Shen Hong-yu, HU Tao, Guo-Chih Wei, Dong Shu-rong","doi":"10.1109/IPFA47161.2019.8984868","DOIUrl":null,"url":null,"abstract":"A novel silicon-controlled rectifier (SCR) named VSCR with simple layout structure is proposed in this paper. With an embedded SCR structure in a traditional diode by using p-type ESD implantation, the proposed device achieves a high ESD robustness with a current level of 33.0 mA/μm. In addition, VSCR also have low trigger voltage and high holding voltage which make it suitable for ESD protection of 28-nm CMOS process. This paper also use a gate-monitor in parallel with the VSCR to obtain the true failure current of the device, which further proves that the structure can be used for ESD protection of the Core circuit under the 28-nm process.","PeriodicalId":169775,"journal":{"name":"2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"87 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPFA47161.2019.8984868","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A novel silicon-controlled rectifier (SCR) named VSCR with simple layout structure is proposed in this paper. With an embedded SCR structure in a traditional diode by using p-type ESD implantation, the proposed device achieves a high ESD robustness with a current level of 33.0 mA/μm. In addition, VSCR also have low trigger voltage and high holding voltage which make it suitable for ESD protection of 28-nm CMOS process. This paper also use a gate-monitor in parallel with the VSCR to obtain the true failure current of the device, which further proves that the structure can be used for ESD protection of the Core circuit under the 28-nm process.