S. Crémer, N. Segura, P. Joubin, M. Marin, M. Thomas, C. Richard, S. Boret, D. Benoit, S. Bruyère
{"title":"Impact of layout and process on RF and analog performances of 3D damascene MIM capacitors","authors":"S. Crémer, N. Segura, P. Joubin, M. Marin, M. Thomas, C. Richard, S. Boret, D. Benoit, S. Bruyère","doi":"10.1109/BIPOL.2007.4351879","DOIUrl":null,"url":null,"abstract":"RF and analog designs require high performances MIM capacitors. In order to continue the downscaling of MIM devices, we proposed and integrated a 3D damascene MIM capacitor using Si3N4 dielectric in the copper back-end of a 0.13 mum BICMOS technology. Layout and process have been recently optimized to reach excellent reliability performances while keeping very good RF performances.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"29 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/BIPOL.2007.4351879","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
RF and analog designs require high performances MIM capacitors. In order to continue the downscaling of MIM devices, we proposed and integrated a 3D damascene MIM capacitor using Si3N4 dielectric in the copper back-end of a 0.13 mum BICMOS technology. Layout and process have been recently optimized to reach excellent reliability performances while keeping very good RF performances.