Predicting the Tolerance of Extreme Electromagnetic Interference on MOSFETs

Abstract

Extreme Electromagnetic Interference (EEMI) can cause device malfunction due to reparable upsets before any permanent hardware damage occurs to electronic devices. In this paper, a predictive model is developed to characterize the impact of EEMI on Metal-Oxide Semiconductor Field-Effect Transistors (MOSFETs) prior to any such permanent damage. The predictive model determines the onset of tolerance limits of EEMI on the Ion/Ioff ratio of a MOSFET for a given technology node, using only the most fundamental device parameters - such as the threshold voltage and power supply. The developed model is successfully compared against measurement data from a device fabricated using 350nm standard CMOS process through TSMC. Based on the predictive model the tolerance of the EEMI injected power in a MOSFET reduces due to technology scaling, starting from 9.7dBm at 350nm, and down to -1.7dBm at 65nm technology node.