Transport properties in silicon nanowire transistors with atomically flat interfaces

Abstract

We have fabricated ultra-narrow (sub-10 nm) short channel (100 nm) silicon (Si) nanowire transistors with atomically flat interfaces based on Si-on-Insulator (SOI) substrates. The raised source and drain electrodes were patterned together with the gate electrode. The smaller threshold voltage in the narrower nanowire suggests self-limiting oxidation during the gate oxide formation.