R. Martins, N. Lourenço, A. Canelas, R. Póvoa, N. Horta
{"title":"AIDA: Robust layout-aware synthesis of analog ICs including sizing and layout generation","authors":"R. Martins, N. Lourenço, A. Canelas, R. Póvoa, N. Horta","doi":"10.1109/SMACD.2015.7301703","DOIUrl":null,"url":null,"abstract":"This paper presents AIDA 2015, the newest version of AIDA, an analog integrated circuit design automation environment, which implements a design flow from a circuit-level specification to physical layout description. AIDA results from the integration of two in-house tools, namely, AIDA-C and AIDA-L. AIDA-C consists of an innovative layout-aware optimization-based methodology for automatic sizing of analog ICs. AIDA-L, the layout generator, implements a fully automated layout generation methodology. AIDA-L provides two alternative floorplanners, a template-based and an optimization-based. The placed modules, whose layouts are spawned by the in-house module generator, are fed together with the node electric-currents to the electromigration-aware multi-port Router that finalizes the layout. Finally, the AIDA environment, www.aidasoft.com, is demonstrated for analog IC design, sizing and layout generation, using state-of-the-art technologies, and validated by industrial simulators and analysis tools, such as, HSPICE®, SPECTRE®, ELDO ®, or CALIBRE®.","PeriodicalId":207878,"journal":{"name":"2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"275 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"25","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMACD.2015.7301703","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 25
Abstract
This paper presents AIDA 2015, the newest version of AIDA, an analog integrated circuit design automation environment, which implements a design flow from a circuit-level specification to physical layout description. AIDA results from the integration of two in-house tools, namely, AIDA-C and AIDA-L. AIDA-C consists of an innovative layout-aware optimization-based methodology for automatic sizing of analog ICs. AIDA-L, the layout generator, implements a fully automated layout generation methodology. AIDA-L provides two alternative floorplanners, a template-based and an optimization-based. The placed modules, whose layouts are spawned by the in-house module generator, are fed together with the node electric-currents to the electromigration-aware multi-port Router that finalizes the layout. Finally, the AIDA environment, www.aidasoft.com, is demonstrated for analog IC design, sizing and layout generation, using state-of-the-art technologies, and validated by industrial simulators and analysis tools, such as, HSPICE®, SPECTRE®, ELDO ®, or CALIBRE®.