{"title":"An all-NMOS-transistors digital-to-analog converter","authors":"S. Sharroush","doi":"10.1109/JEC-ECC.2013.6766383","DOIUrl":null,"url":null,"abstract":"There is no doubt that the analog-to-digital (A/D) and digital-to-analog (D/A) converters are two of the most important analog integrated circuits in almost all of the applications. However, several types of D/A converters employ resistors which consume a relatively large silicon area in addition to their poor tolerance. In this paper, an-all-NMOS-transistors D/A converter that depends on charging a capacitor to a voltage that is proportional to the decimal equivalent of the input bits is proposed. This technique can be extended to any number of input bits and will be simulated for the 0.13 μm CMOS technology with VDD = 1.2 V. The choice of the aspect ratios of the employed NMOS transistors will be investigated quantitatively.","PeriodicalId":379820,"journal":{"name":"2013 Second International Japan-Egypt Conference on Electronics, Communications and Computers (JEC-ECC)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 Second International Japan-Egypt Conference on Electronics, Communications and Computers (JEC-ECC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/JEC-ECC.2013.6766383","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
There is no doubt that the analog-to-digital (A/D) and digital-to-analog (D/A) converters are two of the most important analog integrated circuits in almost all of the applications. However, several types of D/A converters employ resistors which consume a relatively large silicon area in addition to their poor tolerance. In this paper, an-all-NMOS-transistors D/A converter that depends on charging a capacitor to a voltage that is proportional to the decimal equivalent of the input bits is proposed. This technique can be extended to any number of input bits and will be simulated for the 0.13 μm CMOS technology with VDD = 1.2 V. The choice of the aspect ratios of the employed NMOS transistors will be investigated quantitatively.