A performance driven macro-cell placement algorithm

T. Gao, P. M. Vaidya, C. Liu
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引用次数: 50

Abstract

The authors present a new performance driven macro-cell placement algorithm. Placement of modules is guided by a set of upper- and lower-bounds on the net wire lengths. A convex programming algorithm is used to compute a set of upper-bounds on the net wire lengths which will ensure that timing requirements between input and output signals are satisfied. A set of lower-bounds is also computed to control signal skews at intermediate points of the circuit. Artificial nets are introduced between all pairs of modules. Lower-bounds on the lengths of the artificial nets are computed to avoid module overlaps in the placement. A modified min-cut placement algorithm is then used to generate a placement that satisfies the upper- and lower-bounds. An iterative procedure is used to modify the set of upper- and lower-bounds to improve the quality of the placement result. Experimental results on eight test examples are included.<>
一种性能驱动的宏单元格放置算法
提出了一种新的性能驱动的宏细胞放置算法。模块的放置由一组网线长度的上限和下限来指导。采用凸规划算法计算出一组网络线长上界,以保证满足输入和输出信号之间的时序要求。还计算了一组下界来控制电路中间点的信号偏斜。各模块对之间引入人工网。计算人工网长度的下界,以避免模块在布放时重叠。然后使用改进的最小切割放置算法生成满足上界和下界的放置。采用迭代法对上界和下界集合进行修改,以提高放置结果的质量。给出了8个测试实例的实验结果
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