R. Belanger, David P. Conrady, P. S. Honsinger, T. Lavery, S. J. Rothman, Erich C. Schanzenbach, D. Sitaram, C. Selinger, R. E. DuBois, G. W. Mahoney, G. Miceli
{"title":"Enhanced chip/package design for the IBM ES/9000","authors":"R. Belanger, David P. Conrady, P. S. Honsinger, T. Lavery, S. J. Rothman, Erich C. Schanzenbach, D. Sitaram, C. Selinger, R. E. DuBois, G. W. Mahoney, G. Miceli","doi":"10.1109/ICCD.1991.139969","DOIUrl":null,"url":null,"abstract":"The automatic placement and wiring programs used for design of the gate array bipolar chips, the TCM logical design optimization for timing, and the automated module wiring programs of the ES/9000 machines are described. An overview of related aspects of the chip and module technologies is given.<<ETX>>","PeriodicalId":239827,"journal":{"name":"[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCD.1991.139969","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
The automatic placement and wiring programs used for design of the gate array bipolar chips, the TCM logical design optimization for timing, and the automated module wiring programs of the ES/9000 machines are described. An overview of related aspects of the chip and module technologies is given.<>