A programmable BIST for embedded SDRAM

Abstract

The BIST (Built-In-Self-Test) provides a cost-effective solution in testing an embedded DRAM. This project develops a programmable BIST in support of a variety of test algorithms and SDRAM operation modes. The Verilog BIST modules are parameterized such that an SDRAM BIST circuit can be generated for a given SDRAM configuration. Also developed is software supporting mapping between physical and logical addresses and data, as well as translation from assembly programs to machine code used directly by the BIST. The result is an easy-to-use BIST generator for testing embedded SDRAMS.