{"title":"Design of low-power short-distance opto-electronic transceiver front-ends with scalable supply voltages and frequencies","authors":"Xuning Chen, Gu-Yeon Wei, L. Peh","doi":"10.1145/1393921.1393994","DOIUrl":null,"url":null,"abstract":"The need for low-power I/Os is widely recognized, as I/Os take up a significant portion of total chip power. In recent years, researchers have pointed to the potential system-level power savings that can be realized if dynamic voltage scalable I/Os are available. However, substantial challenges remain in building such links. This paper presents the design and implementation details of opto-electronic transceiver front-end blocks where supply voltage can scale from 1.2 V to 0.6 V with almost linearly scalable bandwidth from 8 Gb/s to 4 Gb/s, and power consumption from 36 mW to 5 mW in a 130 nm CMOS process. To the best of our knowledge, this is the first circuit demonstration of voltage-scalable optical links. It demonstrates the feasibility of dynamic voltage scalable optical I/Os.","PeriodicalId":166672,"journal":{"name":"Proceeding of the 13th international symposium on Low power electronics and design (ISLPED '08)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-08-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceeding of the 13th international symposium on Low power electronics and design (ISLPED '08)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/1393921.1393994","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 17
Abstract
The need for low-power I/Os is widely recognized, as I/Os take up a significant portion of total chip power. In recent years, researchers have pointed to the potential system-level power savings that can be realized if dynamic voltage scalable I/Os are available. However, substantial challenges remain in building such links. This paper presents the design and implementation details of opto-electronic transceiver front-end blocks where supply voltage can scale from 1.2 V to 0.6 V with almost linearly scalable bandwidth from 8 Gb/s to 4 Gb/s, and power consumption from 36 mW to 5 mW in a 130 nm CMOS process. To the best of our knowledge, this is the first circuit demonstration of voltage-scalable optical links. It demonstrates the feasibility of dynamic voltage scalable optical I/Os.