Serial interface logic built in self test methodology

Abstract

Today's at-speed testing methodology of the Universal Serial Bus(USB) 2.0 functionality cannot be readily achieved, unless high cost testers are used. Even if high cost testers are used, the success of at-speed testing cannot be guaranteed because of the high-speed interfacing between the off-chip memory, tester and the Device-Under-Test, i.e. the USB2.0. This paper presents a methodology that bridges the gap of the near-end and external loopback methods. The logic built in self test (BIST) proposed encompasses solution to test USB2.0 at-speed, single port and full functional with a low cost tester.