K. Patel, U. Neelakantan, S. Gangele, J. G. Vacchani, N. Desai
{"title":"Linear frequency modulation waveform synthesis","authors":"K. Patel, U. Neelakantan, S. Gangele, J. G. Vacchani, N. Desai","doi":"10.1109/SCEECS.2012.6184744","DOIUrl":null,"url":null,"abstract":"Pulse compression plays an important role in design of the radar system. Pulse compression using linear frequency modulation techniques are very popular in modern radar. The linear frequency modulation is used to resolve two small targets that are located at long range with very small separation between them. The primary focus of this paper is the time frequency analysis and generation of LFM waveform using Direct Digital Chirp Synthesis (DDCS). This approach has been implemented on a Field Programmable Gate Array (FPGA) for the Synthetic Aperture Radar (SAR) application.","PeriodicalId":372799,"journal":{"name":"2012 IEEE Students' Conference on Electrical, Electronics and Computer Science","volume":"156 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE Students' Conference on Electrical, Electronics and Computer Science","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SCEECS.2012.6184744","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 13
Abstract
Pulse compression plays an important role in design of the radar system. Pulse compression using linear frequency modulation techniques are very popular in modern radar. The linear frequency modulation is used to resolve two small targets that are located at long range with very small separation between them. The primary focus of this paper is the time frequency analysis and generation of LFM waveform using Direct Digital Chirp Synthesis (DDCS). This approach has been implemented on a Field Programmable Gate Array (FPGA) for the Synthetic Aperture Radar (SAR) application.