{"title":"A novel conflict directed jumping algorithm for hardware-based SAT solvers","authors":"M. Safar, M. Shalan","doi":"10.1109/IDT.2010.5724417","DOIUrl":null,"url":null,"abstract":"Much of the performance improvement achieved by state-of-the-art SAT solvers is related to the implementation of conflict analysis which enables the solver to perform nonchronological conflict-based backjumping and learn new clauses. However, these techniques have been ignored by the majority of hardware SAT solvers or are executed on some coupled software running on an attached host processor. In this paper, we present a reconfigurable hardware SAT solver that performs a search algorithm combining the advanced techniques: non-chronological backjumping, dynamic backtracking and learning. The whole execution is done in hardware eliminating any runtime communication with the host processor. The feasibility of the proposed approach is experimented through instances from the DIMACS benchmarks suite.","PeriodicalId":153183,"journal":{"name":"2010 5th International Design and Test Workshop","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 5th International Design and Test Workshop","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IDT.2010.5724417","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Much of the performance improvement achieved by state-of-the-art SAT solvers is related to the implementation of conflict analysis which enables the solver to perform nonchronological conflict-based backjumping and learn new clauses. However, these techniques have been ignored by the majority of hardware SAT solvers or are executed on some coupled software running on an attached host processor. In this paper, we present a reconfigurable hardware SAT solver that performs a search algorithm combining the advanced techniques: non-chronological backjumping, dynamic backtracking and learning. The whole execution is done in hardware eliminating any runtime communication with the host processor. The feasibility of the proposed approach is experimented through instances from the DIMACS benchmarks suite.