FSK demodulator and FPGA based BER measurement system for low IF receivers

K. N. Sankar, Abhishek Srivastava, Baibhab Chatterjee, K. K. Rakesh, M. Baghini
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引用次数: 1

Abstract

This paper presents a binary frequency shift keying (BFSK) demodulator for low intermediate frequency (IF) receivers and an FPGA based bit error rate (BER) measurement platform for the same. The custom made demodulator is fabricated in 180 nm CMOS mixed mode technology, which occupies an area of 0.09 mm2 and consumes 80 μW power from 1.8 V supply. When integrated with a low IF (2 MHz) receiver front end for Medical Device Radio Communication (MedRadio) spectrum at 400 MHz, the measured BER was less than 10−3 at a data rate of 200 kbps for an FSK frequency deviation of 150 kHz.
基于FSK解调器和FPGA的低中频接收机误码率测量系统
本文提出了一种用于低中频接收机的二进制移频键控(BFSK)解调器和一种基于FPGA的误码率(BER)测量平台。该调制解调器采用180nm CMOS混合模式技术,面积为0.09 mm2, 1.8 V电源功耗为80 μW。当与400 MHz医疗设备无线电通信(MedRadio)频谱的低中频(2 MHz)接收器前端集成时,在数据速率为200 kbps、FSK频率偏差为150 kHz时,测量到的误码率小于10−3。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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