Design and implementation of a self-checking scheme for railway trackside systems

Abstract

We propose the self-checking design of the transmission and reception blocks of a trackside control system used for railway applications. Our scheme has been conceived for field-programmable gate arrays. A prototype has been implemented, whose correct operation has been verified by means of post-layout simulations and experimental measurements. Our scheme negligibly impacts system's performance and features self-checking ability with respect to a wide set of possible internal faults, representative of the most likely faults for FPGA-implemented systems.