Pai-Ying Liao, S. Alajlouni, Zuxun Zhang, Z. Lin, M. Si, J. Noh, T. Feygelson, M. Tadjer, A. Shakouri, P. Ye
{"title":"Transient Thermal and Electrical Co-Optimization of BEOL Top-Gated ALD In₂O₃ FETs on Various Thermally Conductive Substrates Including Diamond","authors":"Pai-Ying Liao, S. Alajlouni, Zuxun Zhang, Z. Lin, M. Si, J. Noh, T. Feygelson, M. Tadjer, A. Shakouri, P. Ye","doi":"10.1109/IEDM45625.2022.10019438","DOIUrl":null,"url":null,"abstract":"In this work, we co-optimize the transient thermal and electrical characteristics of top-gated (TG), ultrathin, atomic-layer-deposited (ALD), back-end-of-line (BEOL) compatible indium oxide (In2 O3) transistors on various thermally conductive substrates by visualization of the self-heating effect (SHE) utilizing an ultrafast high-resolution (HR) thermo-reflectance (TR) imaging system and overcome the thermal challenges through substrate thermal management and short-pulse measurement. At the steady-state, the temperature increase $(\\Delta \\mathrm{T})$ of the devices on highly resistive silicon (HR Si) and diamond substrates are roughly 6 and 13 times lower than that on SiO $_{2} /$Si substrate, due to the higher thermal conductivities $(\\kappa) $ of HR Si and diamond. Consequently, ultrahigh drain current (ID) of 3.7 mA$/ \\mu \\mathrm{m}$ at drain voltage (VDS) of 1.4 V with direct current (DC) measurement is achieved with TG ALD In2 O3 FETs on diamond substrate. Furthermore, transient thermal study shows that it takes roughly 350 and 300 ns for the devices to heat-up and cool-down to the steady-states, being independent on the substrate. The extracted time constants of heat-up $(\\tau_{h})$ and cool-down $(\\tau_{c})$ processes are 137 and 109 ns, respectively. By employing electrical short-pulse measurement with pulse width (tpulse) shorter than $\\tau_{h}$, the SHE can be significantly reduced. Accordingly, a higher ID of 4.3 mA$/ \\mu \\mathrm{m}$ is realized with a 1.9nm-thick In2 O3 FET on HR Si substrate after co-optimization.","PeriodicalId":275494,"journal":{"name":"2022 International Electron Devices Meeting (IEDM)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-12-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 International Electron Devices Meeting (IEDM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM45625.2022.10019438","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
In this work, we co-optimize the transient thermal and electrical characteristics of top-gated (TG), ultrathin, atomic-layer-deposited (ALD), back-end-of-line (BEOL) compatible indium oxide (In2 O3) transistors on various thermally conductive substrates by visualization of the self-heating effect (SHE) utilizing an ultrafast high-resolution (HR) thermo-reflectance (TR) imaging system and overcome the thermal challenges through substrate thermal management and short-pulse measurement. At the steady-state, the temperature increase $(\Delta \mathrm{T})$ of the devices on highly resistive silicon (HR Si) and diamond substrates are roughly 6 and 13 times lower than that on SiO $_{2} /$Si substrate, due to the higher thermal conductivities $(\kappa) $ of HR Si and diamond. Consequently, ultrahigh drain current (ID) of 3.7 mA$/ \mu \mathrm{m}$ at drain voltage (VDS) of 1.4 V with direct current (DC) measurement is achieved with TG ALD In2 O3 FETs on diamond substrate. Furthermore, transient thermal study shows that it takes roughly 350 and 300 ns for the devices to heat-up and cool-down to the steady-states, being independent on the substrate. The extracted time constants of heat-up $(\tau_{h})$ and cool-down $(\tau_{c})$ processes are 137 and 109 ns, respectively. By employing electrical short-pulse measurement with pulse width (tpulse) shorter than $\tau_{h}$, the SHE can be significantly reduced. Accordingly, a higher ID of 4.3 mA$/ \mu \mathrm{m}$ is realized with a 1.9nm-thick In2 O3 FET on HR Si substrate after co-optimization.