New design concept of ESD protection circuits in SOI BiCDMOS LSI for automotive applications

Abstract

Using TLP tester and device simulation, we investigated the I-V characteristics of two devices and the behavior of the NPN in high current region. The NPN is suitable device for ESD protection circuits. Especially, collector to base space is an important design parameter. We achieved low holding voltage, low on-resistance and high failure current by optimizing collector to base space of the NPN. Therefore we propose the ESD protection using circuits that consists of the NPN automotive applications.