Research of adiabatic multiplier based on CTGAL

Abstract

Based on the study of clocked transmission gate adiabatic logic (CTGAL) circuit, a new adiabatic multiplier is proposed in this paper. It consists of a partial-product generator, a partial-product compressor and a parallel prefix adder. CTGAL is used in all the circuits to charge and discharge the node capacitances without the threshold value losing and the charge on the output node capacitances can be recovered completely. So the power consumption of the newly designed circuits is significantly reduced. Computer simulation results verify the valid functionality and the significant energy recovery characteristic of the designed circuits.