A monolithic isolated gate driver using an on-chip transformer and a voltage level shifter

Kai-Chieh Lin, Jau-Jr Lin
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引用次数: 3

Abstract

This paper proposes a monolithic isolated gate driver design with a voltage level shifter. Incorporating voltage level converters can effectively reduce input drive voltage requirements and the overall energy needed to the power gate drivers. The on-chip transformer detailed in this study consists of a pair of on-chip inductors. Two types of the on-chip transformer structures are used: a stacked transformer (featuring higher coupling coefficient) and a tapped transformer (featuring higher voltage isolation). The on-chip transformer, full-bridge rectifier, gate driver, and voltage level converter were all produced using the TSMC 0.25-μm HV (high-voltage) CMOS process. Compared to the ündings of the previous study, simulations conducted in this study showed that the proposed monolithic isolated gate driver with a voltage level shifter required a 62% lower power input voltage and 34% less power consumption. Moreover, it could provide 12 V of output voltage and drive a load of 6000 pF with the rise and fall time less than 1 μs.
采用片上变压器和电压电平移位器的单片隔离栅极驱动器
本文提出了一种带电压电平移位器的单片隔离栅驱动器设计。结合电压电平变换器可以有效地降低输入驱动电压要求和电源栅极驱动器所需的总能量。本研究详细介绍的片上变压器由一对片上电感器组成。采用两种片上变压器结构:堆叠变压器(具有较高的耦合系数)和抽头变压器(具有较高的电压隔离)。片上变压器、全桥整流器、栅极驱动器和电压电平变换器均采用台积电0.25-μ HV(高压)CMOS工艺生产。与之前的研究结果相比,本研究的仿真结果表明,采用电压电平移位器的单片隔离栅驱动器所需的输入电压降低62%,功耗降低34%。可提供12 V的输出电压,驱动6000 pF的负载,上升和下降时间小于1 μs。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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