{"title":"A monolithic isolated gate driver using an on-chip transformer and a voltage level shifter","authors":"Kai-Chieh Lin, Jau-Jr Lin","doi":"10.1109/CIRSYSSIM.2017.8023187","DOIUrl":null,"url":null,"abstract":"This paper proposes a monolithic isolated gate driver design with a voltage level shifter. Incorporating voltage level converters can effectively reduce input drive voltage requirements and the overall energy needed to the power gate drivers. The on-chip transformer detailed in this study consists of a pair of on-chip inductors. Two types of the on-chip transformer structures are used: a stacked transformer (featuring higher coupling coefficient) and a tapped transformer (featuring higher voltage isolation). The on-chip transformer, full-bridge rectifier, gate driver, and voltage level converter were all produced using the TSMC 0.25-μm HV (high-voltage) CMOS process. Compared to the ündings of the previous study, simulations conducted in this study showed that the proposed monolithic isolated gate driver with a voltage level shifter required a 62% lower power input voltage and 34% less power consumption. Moreover, it could provide 12 V of output voltage and drive a load of 6000 pF with the rise and fall time less than 1 μs.","PeriodicalId":342041,"journal":{"name":"2017 International Conference on Circuits, System and Simulation (ICCSS)","volume":"248 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-07-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 International Conference on Circuits, System and Simulation (ICCSS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CIRSYSSIM.2017.8023187","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
This paper proposes a monolithic isolated gate driver design with a voltage level shifter. Incorporating voltage level converters can effectively reduce input drive voltage requirements and the overall energy needed to the power gate drivers. The on-chip transformer detailed in this study consists of a pair of on-chip inductors. Two types of the on-chip transformer structures are used: a stacked transformer (featuring higher coupling coefficient) and a tapped transformer (featuring higher voltage isolation). The on-chip transformer, full-bridge rectifier, gate driver, and voltage level converter were all produced using the TSMC 0.25-μm HV (high-voltage) CMOS process. Compared to the ündings of the previous study, simulations conducted in this study showed that the proposed monolithic isolated gate driver with a voltage level shifter required a 62% lower power input voltage and 34% less power consumption. Moreover, it could provide 12 V of output voltage and drive a load of 6000 pF with the rise and fall time less than 1 μs.