Le Ye, H. Liao, Fei Song, Jiang Chen, Congyin Shi, Chen Li, Junhua Liu, Ru Huang, Jinshu Zhao, Huiling Xiao, Ruiqiang Liu, Xin'an Wang
{"title":"A single-chip CMOS UHF RFID Reader transceiver for mobile applications","authors":"Le Ye, H. Liao, Fei Song, Jiang Chen, Congyin Shi, Chen Li, Junhua Liu, Ru Huang, Jinshu Zhao, Huiling Xiao, Ruiqiang Liu, Xin'an Wang","doi":"10.1109/ESSCIRC.2009.5326003","DOIUrl":null,"url":null,"abstract":"A UHF RFID Reader Transceiver for China standard (840∼925 MHz) as well as meeting the protocols of EPC Class-1 Gen-2 and ISO/IEC 18000–6C is presented. To suppress the large self-jammer from transmitter to receiver, an on-chip self-jammer cancellation (SC) circuits and a fully-integrated DC-offset Cancellation (DCOC) circuits with quickly time-varying cut-off frequency are proposed to kill the self-jammer within 15 µs. Furthermore, a mixer with capacitor cross-coupled (CCC) common-gate input stage and vertical NPN BJT switching stage is proposed to achieve high linearity (−8 dBm P1dB), good wideband matching and low 1/f noise corner. The transmitter integrated with a CMOS class-AB PA of 22 dBm output power in linear mode with 35% PAE, which is suitable for mobile applications, supports the DSB/SSB/PR-ASK modulation schemes and achieves ACPR1 of −45 dBc and ACPR2 of −60 dBc, which satisfies the stringent spectral mask of China local requirements. A sigma-delta PLL with a single LC VCO is also implemented for 250 kHz channel hopping and good phase noise (−126 dBc/Hz at 1MHz offset). The receiver has a sensitivity of down to −77 dBm in the presence of 20 dBm PA output power. The single-chip is implemented in standard 0.18 µm CMOS process. It occupies 13.5 mm2 silicon areas, and consumes 113 mA (without PA) from 1.8V supply voltage.","PeriodicalId":258889,"journal":{"name":"2009 Proceedings of ESSCIRC","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-11-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 Proceedings of ESSCIRC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2009.5326003","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A UHF RFID Reader Transceiver for China standard (840∼925 MHz) as well as meeting the protocols of EPC Class-1 Gen-2 and ISO/IEC 18000–6C is presented. To suppress the large self-jammer from transmitter to receiver, an on-chip self-jammer cancellation (SC) circuits and a fully-integrated DC-offset Cancellation (DCOC) circuits with quickly time-varying cut-off frequency are proposed to kill the self-jammer within 15 µs. Furthermore, a mixer with capacitor cross-coupled (CCC) common-gate input stage and vertical NPN BJT switching stage is proposed to achieve high linearity (−8 dBm P1dB), good wideband matching and low 1/f noise corner. The transmitter integrated with a CMOS class-AB PA of 22 dBm output power in linear mode with 35% PAE, which is suitable for mobile applications, supports the DSB/SSB/PR-ASK modulation schemes and achieves ACPR1 of −45 dBc and ACPR2 of −60 dBc, which satisfies the stringent spectral mask of China local requirements. A sigma-delta PLL with a single LC VCO is also implemented for 250 kHz channel hopping and good phase noise (−126 dBc/Hz at 1MHz offset). The receiver has a sensitivity of down to −77 dBm in the presence of 20 dBm PA output power. The single-chip is implemented in standard 0.18 µm CMOS process. It occupies 13.5 mm2 silicon areas, and consumes 113 mA (without PA) from 1.8V supply voltage.