{"title":"Charge-to-breakdown and trap generation process in thin oxides","authors":"G. Bersuker, J. Werking, D. Chan","doi":"10.1109/IRWS.1997.660284","DOIUrl":null,"url":null,"abstract":"In the proposed model, trap generation is assumed to be triggered by the collision of injected electrons with oxide atoms. The model suggests that thinner oxides are less susceptible to charging stress due to both lower probability of electron collision and lower electron impact energy. The difference in positive and negative gate bias charge-to-breakdown data is attributed to the formation of a structural transition layer at the Si-SiO/sub 2/ interface. The model is used for analysis of the effects of process induced charging damage on transistor parameters. It is found that after heavy stress, leakage current is determined by the probability of trap assisted tunneling, while the density of generated traps controls leakage in lightly damaged oxides.","PeriodicalId":193522,"journal":{"name":"1997 IEEE International Integrated Reliability Workshop Final Report (Cat. No.97TH8319)","volume":"376 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1997 IEEE International Integrated Reliability Workshop Final Report (Cat. No.97TH8319)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IRWS.1997.660284","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In the proposed model, trap generation is assumed to be triggered by the collision of injected electrons with oxide atoms. The model suggests that thinner oxides are less susceptible to charging stress due to both lower probability of electron collision and lower electron impact energy. The difference in positive and negative gate bias charge-to-breakdown data is attributed to the formation of a structural transition layer at the Si-SiO/sub 2/ interface. The model is used for analysis of the effects of process induced charging damage on transistor parameters. It is found that after heavy stress, leakage current is determined by the probability of trap assisted tunneling, while the density of generated traps controls leakage in lightly damaged oxides.