High-density SRAM voltage scaling enabled by inserted-oxide FinFET technology

Abstract

A scheme to precisely adjust the drive strength of an inserted-oxide FinFET (iFinFET), to enhance the manufacturing yield of a minimally sized six-transistor (6-T) SRAM cell, is proposed. Specifically, the top nanowire (NW) channel in an iFinFET can be made to be essentially non-conducting by ion implantation to increase its threshold voltage, and the position of the inserted-oxide layer can be optimized for maximum cell yield at low operating voltage. Via three-dimensional (3-D) device simulations and a calibrated compact model, this scheme is projected to lower the minimum operating voltage (Vmin) of a minimally sized 6-T SRAM cell.