Jiawei Cui, Yanlin Wu, Junjie Yang, Jingjing Yu, Teng Li, Xuelin Yang, B. Shen, Maojun Wang, Jin Wei
{"title":"Method to Study Dynamic Depletion Behaviors in High-Voltage ($BV=1.4\\ \\text{kV}$) p-GaN Gate HEMT on Sapphire Substrate","authors":"Jiawei Cui, Yanlin Wu, Junjie Yang, Jingjing Yu, Teng Li, Xuelin Yang, B. Shen, Maojun Wang, Jin Wei","doi":"10.1109/ISPSD57135.2023.10147490","DOIUrl":null,"url":null,"abstract":"This study presents an investigation of high-voltage enhancement-mode p-GaN gate HEMTs on a sapphire substrate. The breakdown voltage of the devices shows a linear relationship with the $L_{\\text{GD}}$. For $L_{\\text{GD}}=27 \\mu\\mathrm{m}$, the device exhibits a high breakdown voltage of 1412 V. The threshold voltage is 0.9 V. The $R_{\\text{on}}$ is $17.7\\ \\ \\Omega\\cdot \\text{mm}$, and the specific on-resistance $R_{\\text{sp}}$ is $6.73\\ \\mathrm{m}\\Omega\\cdot \\text{cm}^{2}$. To measure the depletion region directly for high-voltage devices, depletion-testing structures were fabricated alongside the HEMTs. The depletion lengths were determined based on the I-$V$ characteristics of the structures, with the pinch-off voltage of the I-$V$ characteristics correlated to the depletion length. Additionally, using pulse waveforms as the gate control signals, the formation of the depletion region under dynamic conditions was revealed.","PeriodicalId":344266,"journal":{"name":"2023 35th International Symposium on Power Semiconductor Devices and ICs (ISPSD)","volume":"114 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 35th International Symposium on Power Semiconductor Devices and ICs (ISPSD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD57135.2023.10147490","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This study presents an investigation of high-voltage enhancement-mode p-GaN gate HEMTs on a sapphire substrate. The breakdown voltage of the devices shows a linear relationship with the $L_{\text{GD}}$. For $L_{\text{GD}}=27 \mu\mathrm{m}$, the device exhibits a high breakdown voltage of 1412 V. The threshold voltage is 0.9 V. The $R_{\text{on}}$ is $17.7\ \ \Omega\cdot \text{mm}$, and the specific on-resistance $R_{\text{sp}}$ is $6.73\ \mathrm{m}\Omega\cdot \text{cm}^{2}$. To measure the depletion region directly for high-voltage devices, depletion-testing structures were fabricated alongside the HEMTs. The depletion lengths were determined based on the I-$V$ characteristics of the structures, with the pinch-off voltage of the I-$V$ characteristics correlated to the depletion length. Additionally, using pulse waveforms as the gate control signals, the formation of the depletion region under dynamic conditions was revealed.