Fermi-level pinning at metal/antimonides interface and demonstration of antimonides-based metal S/D Schottky pMOSFETs

Abstract

III–V semiconductors are considered as promising candidates to replace silicon as the channel material in future technology nodes for transistors [1]. III–V n-channel MOSFETs have been extensively studied [2–4], showing high electron mobility. However, one of the most critical challenges in realizing high performance III–V MOSFETs is the difficulties in source/drain (S/D) design including parasitic resistance due to low solubility and poor activation of dopant and the “source starvation” effect due to low density of states [5–6]. Annealing of implant damage after S/D ion-implantation is also more problematic in III–V's due to the presence of 2 or more atomic species vs. group IV semiconductors (Fig.1). Use of Schottky-barrier (SB) metal S/D is a promising strategy to overcome these limitations [7]. Meanwhile, for III–V based CMOS logic, achieving a high mobility pMOSFET in a III–V channel remains a challenge. Antimony (Sb) based compound semiconductors have the highest electron and hole mobilities amongst all III–V materials. Recently, high performance strained channel InGaSb pMOSFETs [8] have been demonstrated. In this paper, we study the metal contact to antimonides compound. Good metal contact formed on p-type material and current suppression on n-type samples is attributed to the Fermi-level pinning at metal/antimonide interface and charge-neutral level being near the valence band edge. Schottky-barrier S/D p-MOSFETs is proposed and experimentally demonstrated which combines an InxGa1−xSb channel for good hole transport with metal S/D for low access resistance.