Fluxless flip-chip for multichip modules

J. Goldstein, E. A. Logan, B.S. Femandez
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引用次数: 0

Abstract

The no-flux, Utilitarian Solder System ("No-FUSS") flip-chip process is a versatile technique that can be used with virtually any die. The process combines Au ball bumping of the die with Pb/Sn-indium electroplating of the substrate. Previous work demonstrated that substrates electroplated with an 8 /spl mu/m indium cap over 16 /spl mu/m of 95Pb/5Sn had shown consistently reliable interconnects after thermal shock and thermal aging testing. Preliminary evaluations of samples with only 2 /spl mu/m of indium over 22 /spl mu/m of 95Pb/5Sn had shown promising results from a metallurgical viewpoint and further work was recommended. The current study compares the reliability and reproducibility of flip-chip interconnects prepared with a 2 /spl mu/m indium cap with previous data from 8 /spl mu/m samples. The results indicate that, although it is possible to produce low resistance, reliable interconnect using a 2 /spl mu/m indium layer, the process is nor yet as reproducible as the 8 /spl mu/m process and requires further development before it can be fully utilized.
用于多芯片模块的无磁倒装芯片
无助焊剂,实用焊料系统(“No-FUSS”)倒装芯片工艺是一种通用技术,可用于几乎任何模具。该工艺结合了模具的Au球碰撞和衬底的Pb/ sn -铟电镀。先前的工作表明,在经过热冲击和热老化测试后,电镀8 /spl μ m铟帽和16 /spl μ m 95Pb/5Sn的衬底显示出一致可靠的互连。从冶金学的角度来看,对铟含量仅为2 /spl mu/m的样品和95Pb/5Sn含量为22 /spl mu/m的样品的初步评价显示出很好的结果,并建议进一步开展工作。目前的研究比较了用2 /spl μ m铟盖制备的倒装芯片互连的可靠性和可重复性,与以前8 /spl μ m样品的数据。结果表明,虽然使用2 /spl μ m铟层可以产生低电阻、可靠的互连,但该工艺的可重复性尚不如8 /spl μ m铟层,需要进一步开发才能充分利用。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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