A 10-GHz Fast-Locked All-Digital Frequency Synthesizer with Frequency-Error Detection

Abstract

This paper presents a 10-GHz all-digital phaselocked loop (ADPLL) frequency synthesizer with a fast-locked technique. The proposed fast-locked technique uses two mechanisms that optimize each other. One enhances the capability of frequency-tracking, the other uses a method for detecting frequency-error to improve the efficiency of frequencytracking. The ADPLL synthesizer is fabricated in a 0.18 um CMOS process, and its operating frequency is from 9.4 GHz to 10.4 GHz. The total power consumption is 30.6mW with 1.8V supply voltage. The locked time is 0.88 us and 190 us with and without the fast-locked technique when the frequency hopping distance is 400 MHz, respectively.