{"title":"Operation method in fuzzy set operation processor","authors":"A. Katsumata, Hidekazu Tokunaga, S. Yasunobu","doi":"10.1109/ICCD.1991.139921","DOIUrl":null,"url":null,"abstract":"A VLSI for diverse fuzzy set operations (FSP: fuzzy set processor) uses a single instruction multiple data stream (SIMD) architecture that is composed of four basic operation units and a variable microprogram control circuit. Speed increases of 50 times over a RISC-type CPU are possible when executing fuzzy set operations using a 16 basic operation unit (four processor) SIMD architecture.<<ETX>>","PeriodicalId":239827,"journal":{"name":"[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCD.1991.139921","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A VLSI for diverse fuzzy set operations (FSP: fuzzy set processor) uses a single instruction multiple data stream (SIMD) architecture that is composed of four basic operation units and a variable microprogram control circuit. Speed increases of 50 times over a RISC-type CPU are possible when executing fuzzy set operations using a 16 basic operation unit (four processor) SIMD architecture.<>