A 16 cm/sup 2/ monolithic multiprocessor system integrating 9 video signal-processing elements

Abstract

The 16.6 cm/sup 2/ integrated circuit (LAIC) integrates a MIMD based multiprocessor system for real-time video coding applications (H.261, MPEG-1 and MPEG-2) that consists of identical bus-connected processing elements (PEs). Each PE contains a RISC processor core for controlling tasks and a low-level coprocessor (LCP) for fast processing of computation-intensive convolution-type tasks. The LCP consists of an arithmetic processing unit (APU), a controlling unit (CU), and a local memory (LM). The APU consists of four identical parallel and pipelined data paths with a common multi-operand accumulator. The results of the APU are stored in the LM for faster access. Address sequences for the LM are generated by the microprogrammable CU which is supervised by the RISC processor. At a clock rate of 66 MHz, a single PE provides a peak arithmetic performance of more than 1 GOPS. The basic arithmetic units (adders, multipliers, multioperand accu, shifter and ALU) and the single-, dual- and quad-port SRAMs used in RISC and LCP are implemented as full-custom macros.